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// PowerCapabilities

//

//===========================================================

int

PowerCapabilities( unsigned char *ucModes,

unsigned char *ucMajorVer,

unsigned char *ucMinorVer)

{

union REGS regs;

struct SREGS segregs;

int iResult;


regs.h.ah = 0x4f;

regs.h.al = 0x10;

regs.h.bl = 0x00;


segregs.es = 0x00;

regs.x.di = 0x00;


int86x(0x10, &regs, &regs, &segregs);


*ucModes = regs.h.bh;

*ucMinorVer = regs.h.bl & 0x0F; //

*ucMajorVer = (regs.h.bl & 0xF0) >> 4; //


iResult = AnalyseResult(regs);


return iResult;

}


//===========================================================

// AnalyseResult

// ,

// Power VBE

//===========================================================

int

AnalyseResult(union REGS regs)

{

int iResult;


// VBE Power Management

if((regs.h.al == 0x4f) && (regs.h.ah == 0))

iResult = 0;


//

else if(regs.h.al != 0x4f)

iResult = -1;


//

else

iResult = 1;


return iResult;

}